The present invention relates to semiconductor devices and in particular to a technology effectively applicable to semiconductor devices in the form of a resin sealed semiconductor package.
Various types of semiconductor packages are used and among them, there is a resin sealed semiconductor package in which a semiconductor chip is sealed with an encapsulation resin portion. In resin sealed semiconductor packages, a semiconductor chip is sealed in an encapsulation resin portion; therefore, the reliability of the semiconductor chip can be enhanced. When a terminal is exposed in the back surface of the encapsulation resin portion, the resin sealed semiconductor package can be surface mounted.
To achieve the miniaturization of a power supply circuit or the like and measures for high-speed response, in recent years, the frequency of power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) used in power supply circuits has been more and more increased. Especially, the CPUs, DSPs, and the like of desktop and notebook personal computers, servers, game machines, and the like are on trends to large current and high frequencies. For this reason, technological development has been promoted so that power MOSFETS comprising non-isolated DC-DC converters for controlling power supplies to these CPUs (Central Processing Units) and DSPs (Digital Signal Processors) can also cope with large current and high frequencies.
In the DC-DC converter in wide use as an example of a power supply circuit, a power MOSFET for high-side switch and a power MOSFET for low-side switch are coupled in series. The power MOSFET for high-side switch has a switch function for control of the DC-DC converter and the power MOSFET for low-side switch has a switch function for synchronous rectification. Power supply voltage is converted by alternately turning on and off these two power MOSFETs in synchronization with each other.
Japanese Unexamined Patent Publication No. 2003-124436 (Patent Document 1) describes a technology related to a semiconductor device obtained by setting the following chips in one sealing body: a chip including the high-side power MOS circuit portion of the DC-DC converter and a chip including the low-side power MOS circuit portion.
Japanese Unexamined Patent Publication No. 2007-266218 (Patent Document 2) describes a technology related to a semiconductor device obtained by encapsulating the following chips in one package: a semiconductor chip in which a power MOSFET for high-side switch is formed; a semiconductor chip in which a power MOSFET for low-side switch is formed; and a semiconductor chip in which a control circuit controlling their operation is formed.
[Patent Document 1] Japanese Unexamined Patent Publication No. 2003-124436
[Patent Document 2] Japanese Unexamined Patent Publication No. 2007-266218